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atomic: Use DMB ISHLD for aarch64 acquire barrier

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This is a little more efficient than a DMB ISH and matches what
GCC, Clang, and MSVC generate for a C++11 acquire fence.

(cherry picked from commit 7751494160)
This commit is contained in:
Cameron Gutman 2026-04-23 21:18:05 -05:00
parent 4bce8906fc
commit 34742887ef
1 changed files with 1 additions and 1 deletions
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include/SDL_atomic.h
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@ -182,7 +182,7 @@ extern DECLSPEC void SDLCALL SDL_MemoryBarrierAcquireFunction(void);
#define SDL_MemoryBarrierAcquire() __asm__ __volatile__ ("lwsync" : : : "memory")
#elif defined(__GNUC__) && defined(__aarch64__)
#define SDL_MemoryBarrierRelease() __asm__ __volatile__ ("dmb ish" : : : "memory")
#define SDL_MemoryBarrierAcquire() __asm__ __volatile__ ("dmb ish" : : : "memory")
#define SDL_MemoryBarrierAcquire() __asm__ __volatile__ ("dmb ishld" : : : "memory")
#elif defined(__GNUC__) && defined(__arm__)
#if 0 /* defined(__LINUX__) || defined(__ANDROID__) */
/* Information from: