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Add SVE2 SIMD Alpha-Blending Blitter (#15504)

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SVE/SVE2 is a new SIMD extension for AArch64. Compared to NEON, SVE/SVE2 brings the following benefits that are good for SDL projects:

- Lane prediction: we don't have to treat the tail part of a stride separately when the width is n times the hardware vector size
- Although the performance is almost no difference from NEON when the hardware vector size is 128bits, when the hardware provides a longer vector size, e.g. 256, 512, ... 2048, we can enjoy the large performance gain without modifying the source code or recompiling a library.

The functional correctness is validated in a dedicated [qemu project](https://github.com/GorgonMeducer/aarch64_qemu_mac_template/tree/SDL-SVE2-Acceleration-Validation).

The performance is tested on [Radxa Orion 6 N](https://radxa.com/products/orion/o6n/), which provides 4x A720 and 4x A520 processors. Since the vector size is 128 bits, which is the same as NEON, the performance is almost the same (or no worse than) the NEON acceleration.
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Gabriel Wang 2026-05-14 14:37:46 +08:00 • committed by GitHub
parent 0e5e772ba9
commit 0f175891a6
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src/dynapi/SDL_dynapi_overrides.h
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@ -1314,3 +1314,4 @@
#define SDL_IsPhone SDL_IsPhone_REAL
#define SDL_LoadJPG_IO SDL_LoadJPG_IO_REAL
#define SDL_LoadJPG SDL_LoadJPG_REAL
#define SDL_HasSVE2 SDL_HasSVE2_REAL